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361	c 2014 Aditya Agrawal REFRESH REDUCTION IN DYNAMIC MEMORIES BY Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2014-12-18 00:19:39 EDRAM Dynamic random-access memory Memory refresh CPU cache AMD 10h Memory hierarchy Random-access memory Microarchitecture Computer memory Computer hardware Computing
362	The Gap between Processor and Memory Speeds Carlos Carvalho Departamento de Informática, Universidade do Minho[removed]Braga, Portugal [removed] Add to Reading List Source URL: gec.di.uminho.pt Language: English - Date: 2002-01-26 07:51:02 Digital media Dynamic random-access memory RDRAM Synchronous dynamic random-access memory Random-access memory Memory controller CAS latency Double data rate DDR SDRAM Computer memory Computer hardware Computing
363	D:/MSR Internship/MASCOTS/MASCOTS/MASCOTS.dvi Add to Reading List Source URL: www.dtc.umn.edu Language: English - Date: 2012-08-16 12:29:07 Solid-state drive Cache Flash memory Page replacement algorithm IOPS Dynamic random-access memory Wear leveling Flash file system Paging Computer hardware Computer memory Computing
364	UM10850 LPC5410x User manual Rev. 1.0 — 5 November 2014 User manual Add to Reading List Source URL: www.nxp.com Language: English - Date: 2015-02-13 05:34:09 ARM architecture Electronics ARM Cortex-M Mbed microcontroller I²C Static random-access memory EFM32 STM32 Computer architecture Microcontrollers Computer hardware
365	IMAGINE: Signal and Image Processing Using Streams Brucek Khailany William J. Dally, Scott Rixner, Ujval J. Kapasi, Peter Mattson, Jinyung Namkoong, John D. Owens, Brian Towles Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:38:09 Stream processing Synchronous dynamic random-access memory Cell Computer engineering Computer architecture Computing GPGPU
366	Microsoft PowerPoint - ICCD99 [Compatibility Mode] Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-26 00:03:32 Computer memory Dynamic random-access memory
367	ES_LPC43S50/S30/S20 Errata sheet LPC43S50, LPC43S30, LPC43S20 Add to Reading List Source URL: www.nxp.com Language: English - Date: 2015-02-23 04:01:35 I²C Embedded systems Synchronous dynamic random-access memory NXP Semiconductors Datasheet I²S Dynamic random-access memory Microcontroller Erratum Computer hardware Technology Computer memory
368	VelaTX™ Innovative 3D Architecture Coupled with Embedded DRAM Architecture Michael C. Lewis, Chief Technology Officer Joseph C. Del Rio, V.P. Engineering Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:48:52 Computer hardware Cray T3D San Jose California Dynamic random-access memory 64-bit Geography of California Computing Computer memory Supercomputers
369	HC17.S4T4 An Ultra High Performance Scalable DSP Family for Multimedia.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:46:54 Digital signal processors Digital signal processing Microprocessors MDSP Multi-core processor Dynamic random-access memory Direct memory access CPU cache CEVA Inc. Computer hardware Computing Computer memory
370	Status and Prospect for MRAM Technology Dr. Saied Tehrani Nonvolatile Memory Seminar Hot Chips Conference August 22, 2010 Memorial Auditorium Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:13:29 Emerging technologies Computing Digital media Spintronics Computer storage Magnetoresistive random access memory Ferroelectric RAM Random-access memory Resistive random-access memory Computer memory Computer hardware Non-volatile memory

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